Low Cost Quantum Realization of Reversible Multiplier Circuit
نویسندگان
چکیده
منابع مشابه
A Novel Design of Reversible Multiplier Circuit (TECHNICAL NOTE)
Adders and multipliers are two main units of the computer arithmetic processors and play an important role in reversible computations. The binary multiplier consists of two main parts, the partial products generation circuit (PPGC) and the reversible parallel adders (RPA). This paper introduces a novel reversible 4×4 multiplier circuit that is based on an advanced PPGC with Peres gates only. Ag...
متن کاملOptimized Reversible Multiplier Circuit
Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing, DNA computing, bioinformatics, and nanotechnology. This paper presents two new 4× 4 bit reversible multiplier designs which have lower hardware complexity, less garbage bits, less quantum cost and less constant inputs than previous ones, and can be generaliz...
متن کاملQuantum Cost Optimization for Reversible Sequential Circuit
Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost,...
متن کاملDesign and Optimization of Reversible Multiplier Circuit
The development of conventional computing technologies faces many challenges for the last couple of decades. Power dissipation in today's computer chips becomes dominant. Reversible computing is a promising alternative to these technologies, with applications in ultra-low power, nano computing, quantum computing, low power CMOS design, optical information processing, bioinformatics etc. In...
متن کاملImproved Cost Reversible Multiplier Design
Reversible logic is an emerging research area and is a promising technology for the next generation of computers. The focus of this paper is improving the design of a multiplier that can be part of any future reversible computer. In this paper, we propose an improvement to the manner in which partial products are generated that improves the efficiency of implementation using repetition codes. T...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Information Technology Journal
سال: 2009
ISSN: 1812-5638
DOI: 10.3923/itj.2009.208.213